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- Settable upper & lower limits (±10 V)
- 10 mV resolution
- 1 MHz bandwidth
- TTL outputs for limit detecting
- High slew rate
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The SIM964 Analog Limiter provides upper and lower voltage limits
for conditioning dynamic signals. Limits are set between ±10
V with 10 mV resolution. Two rear-panel TTL signals are activated
when upper or lower limits are exceeded. The SIM964 uses SRSs
clock-stopping architecture design to eliminate digital noise artifacts.
The low output noise and low harmonic distortion of the SIM964 make
it ideal for many applications.
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Specifications |
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| Limit settings |
±10 V (both upper and lower) |
| Resolution |
10 mV |
| Bandwidth |
1 MHz |
| Limit type |
Soft limit (100 mV range) |
| Input impedance |
1 MΩ |
| Output noise |
<400 µVrms |
| THD |
0.01 % (80 dB) at 1 kHz |
| Slew rate |
20 V/µs |
| Limit detect |
TTL level signals (rear-panel BNC connectors) are high
when upper or lower limits are exceeded. |
| Operating temperature |
0 °C to 40 °C, non-condensing |
| Interface |
Serial via SIM interface |
| Connectors |
BNC (2 front, 2 rear)
DB15 (male) SIM interface |
| Power |
Power supplied by the SIM900 Mainframe, or optionally
by a user-supplied DC power supply (±15 V and +5 V) |
| Dimensions |
1.5" × 3.6" × 7.0" (WHL) |
| Weight |
1.5 lbs. |
| Warranty |
One year parts and labor on defects in materials and workmanship |
Stanford Research Systems, Inc. 1290-D
Reamwood Ave., Sunnyvale, CA 94089
Phone: (408) 744-9040 Fax: (408) 744-9049 email: info@thinkSRS.com
www.thinkSRS.com
© Stanford Research Systems, Inc. 2003
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